SUMMARY OF QUALIFICATIONS
* 6.5 years of experience in analog/mixed-signal CMOS IC design, testing and debug.
* Well experienced in modeling and designing High-Resolution, Low-Noise, Switched-Capacitor, and Power Management circuits with very good first pass success rate.
* Designed and implemented Delta-Sigma ADC, LDO/Linear Regulators, Charge-Pump, Battery Charger, Buffer circuits.
* Experience in top-down system-level design, starting from feasibility study/spec-definition, high-level system design/modeling to transistor-level implementation.
* Extensive lab experience including bench-testing, debug and characterization.
* Exposure to full product cycle, from product definition, design, layout, lab verification, release to production.
* Proficient with CAD and modeling tools like Cadence (Virtuoso, Spectre, APS), MATLAB, Verilog-A, Spice, Ocean.
* Ability to excel under pressure and enthusiastic to meet new challenges.
* Committed, task and target-oriented professional.
EDUCATION
* MS - Electrical Engineering, Arizona State University, Dec 2003.
* B.E. - Electronics & Communication, Barkatullah University, Bhopal, India, June 2000.
EMPLOYMENT HISTORY
* Intersil, Bangalore Design Center, India, July '06 - Aug '11
o Lead Design Engineer (Apr '11 - Aug '11)
o Senior Design Engineer (Apr '08 - Mar '11)
o Design Engineer (Jul '06 - Mar '08)
* KPIT Cummins Infosystems Ltd., Bangalore, India, Dec '04 - June '06
o Design Engineer
RELEVANT PROJECT WORK
INTERSIL, Bangalore Design Center - (July '06 - Aug ' 11)
1. Low-Noise 24-bit Delta-sigma ADC, Vanguard (VIS) 0.25u/5V.
A high-precision switched-cap Delta-Sigma ADC with 22-bit noise-free resolution and rms noise voltage of 240nV at 10 sps and INL of 2 ppm FS. The designed modulator delivers industry leading noise performance at the maximum data rate (in ksps range).
Responsibilities included complete design and simulation of the 3rd order delta-sigma modulator:
* Time-domain modeling of the switched-cap Modulator in MATLAB for optimizing the integrators' paramete-rs, circuit noise analysis and the CMOS circuit implementation of the Modulator blocks - integrators, clocks, summer and comparator; Comprehensive block-level and modulator-top level simulations in Spectre/APS for different spec parameters.
* Supervised/reviewed the layout of the Modulator blocks and top level integration in the chip.
* Setup and ran chip-top level simulations in Ultrasim for functionality verification.
* Post Silicon Validation - Fully functional first revision, met most performance specs at typical conditions. Developed test-plan for bench-testing, did comprehensive testing of various performance parameters across temperature range and debug, on different revisions; Comprehensive characterization of final working silicon, across all supply and temperature ranges. Key performance numbers for the modulator mentioned above.
* Worked with Test Engineering team for debugging issues in ATE-to-Bench correlation at the test facility in Palm Bay, Florida.
* Worked with Failure Analysis team at Palm Bay, FL for debugging a power-down current leakage issue in the chip.
* Supported the Application Engineering activities including chip evaluation.
* The chip has been released for production.
2. Power-Management Bocks for a Blood-Glucose Measuring ASIC (16-bit Delta-sigma ADC), TSMC 0.35u/5V.
Involved in Design, Simulations, Bench-Testing and Characterization of the following blocks:
* Regulated Charge-Pump to produce a regulated supply voltage of 3.4V from an input that varied from 3.6V down to 2.1V. The charge-pump implemented a constant-frequency regulation scheme with dynamic well-biasing of the pmos switches at the output. Silicon results showed the charge-pump maintained the output at ~3.4V for the given battery voltage variation without any significant drop and acceptable ripple on the output voltage. Designed a Low-Dropout Regulator to clean this ripple and feed this cleaned supply (of 2.8V) to all the other analog blocks in the ASIC.
* Sample & Hold Amplifier - A flip-around S&H block which sampled the single-ended output of Trans-Impedance Amplifier and converted the signal to differential, to be presented to the inputs of a Delta-sigma Modulator.
* Buzzer Regulator running off the battery supply (2.1V - 3.6V) with its output regulated at 1.8V level which was then supplied to a buzzer-driver driving a piezo-electric buzzer in the gluco-meter.
* Bench-Testing and C...
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