UNIVERSITY OF MARYLAND COLLEGE PARK
B.S. in Electrical Engineering, A. James Clark School of Engineering
September 2008 - December 2012
AVAILINK US Germantown, MD
Hardware Engineer Mar 2013 – Jan 2015
Designed and verified hardware and accompanying firmware for satellite/terrestrial/cable demodulators. Blocks include a FEC, interfaces (I2C/SPI/DDR), and a baseband frame processor.
Worked with system group to perform bit-accurate verification of HW subsystems against C++ models.
Designed and implemented a Turing-complete scripting language used for demodulator firmware management tasks including download, caching, decompression, and booting. This greatly simplified demod
Used this language to implement an efficient firmware patching mechanism.
Utilized simulation and FPGA prototyping on a daily basis to accomplish design goals.
INTEL CORPORATION Folsom, CA
Power and Performance Architecture Intern Jan 2012 – Aug 2012
Executed experiments to characterize and optimize power and performance of Ivybridge CPUs using automation scripts for both execution and analysis.
Defeatured Ivybridge CPUs for research into future CPU architectures.
Managed laboratory inventory of high-value CPU/chipset components; supported colleagues’ experiments
UNIV. OF MARYLAND, MEMORY SYSTEMS RESEARCH FOR INTEL College Park, MD
Research Assistant for Dr. Bruce Jacob Summer 2011
Researched integration of nonvolatile and DRAM memory into a hybrid main memory system
Utilized simulators DramSim2, HybridSim, NVDSim, and MARSSx86 to run benchmarks, including the
Attended research conference calls with Intel Engineers on a biweekly basis
QUEST HONORS FELLOWS PROGRAM College Park, MD
Quality Enhancement Systems and Teams – Member Fall 2009 – Fall 2012
Proposed an online education portal integrating existing open course-ware
Proposed new system for bus tracking and data distribution on campus using NextBus and an online interface
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